RETURN-LINK PROCESSOR
                        HARDWARE DEFINITION DOCUMENT

                           Kenneth B. Winiecki Jr.
                               Lead Engineer
                    Lockheed-Martin Space Mission Systems

                              January 31, 1997

                        Next Generation Systems Group
                   NASA Goddard Space Flight Center Code 521
                             Greenbelt, Maryland


                                 (Abstract)

The Return-Link Processor PCI Card ("RLP") performs all of the fundamental
satellite telemetry return-link data processing functions in real-time up to
400 Mb/s using industry-standard interfaces and form-factor.  Functions
include frame-synchronization, CRC and BTD decoding, Reed-Solomon error
detection and correction, and CCSDS AOS Service and Conventional Packet/Frame
Telemetry processing.  In a typical scenario, a standard serial data stream
is connected through the I/O Panel, processed in dataflow-fashion through NASA
GSFC custom ASICs, and deposited in a number of FIFO memory buffers for
software running on the PCI host computer to transfer elsewhere.  Weather
Satellite Data and other formats can be frame-synchronized and routed around
the SP and/or RS functions.  Internet and other low-rate computer-accessible
data sources can be injected directly by the host via PCI.  The RLP contains a
connector for an Optional Sorting Module, a variable-sized mezzanine board on
which additional processing, buffering, and output functions can be
implemented.  The RLP features a low replication cost of less than $6,000.